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HSIO Presents Signal-Integrity Challenges

By Rich Nelson, Executive Editor, EE

 

High-speed I/O (HSIO) is presenting significant measurement challenges as fourth-generation standards emerge. As signals traverse at ever higher speeds over serial interfaces or computer backplanes, designers face signal-integrity challenges and need to be able to evaluate complex modulation schemes. Fortunately, vendors are offering instruments including oscilloscopes, bit-error-ratio testers (BERTs), and protocol analyzers as well as hardware and software options that are up to the task.

“The transmission speeds of physical-layer devices and modules are increasing to rates as high as 32 Gb/s,” said Hiroshi Goto, business development manager at Anritsu. Such speeds make signal-integrity analysis ever more important in validating designs and assuring product quality. “Multibit transmission technologies such as 4 Pulse-Amplitude Modulation (4PAM) and 8PAM are being designed into server backplanes and backplane interconnects,” he said. “Quadrature Amplitude Modulation technologies for modulating both phase and amplitude on core networks are being incorporated into designs, as well.”

According to Chris Loberg, senior technical marketing manager at Tektronix, two major test challenges have emerged in the past year: MIPI-related support for the mobile platform specifications and receiver testing and PHY interconnect test for fourth-generation (>8 Gb/s) standards.

“There is much excitement in the industry for the MIPI family of specifications,” Loberg said. The growing market for client devices is combining with a quickly evolving set of interop testing standards for phones and tablets as designers seek optimal performance, he said, adding that the signal characteristics are more dynamic than traditional serial buses. Further, PHY interconnect is delicate, placing more emphasis on package characterization for small devices. “Tektronix is helping by keeping abreast of the MIPI family of Compliance Test Specifications and staying very involved with the test standard developments,” he said. “As a result, we are providing automated test setup and execution/reporting using D-PHY and M-PHY test software packages on our DPO/MSO70000 oscilloscopes.”

As for receiver testing, Loberg said, “The next generation of performance serial-bus standards is pressing the physical capabilities of today’s PC architectures. Electrical eye diagrams are closed unless de-embedding and equalization are applied to the signaling transmission. And concerns about the BER performance of the receivers are requiring stressed receiver tests as part of the compliance check.”

Tektronix, he said, has provided an update to its Serial Data Link Analysis software (SDLA-64 bit) that enables modeling of EQ parameters to be added to the signaling as well as embedding and de-embedding of links/connectors/cables, which can detract from the true performance of the transmitter. On the receiver testing side, he said, “Tektronix has been providing automated, stressed-eye receiver testing software that controls the BERTScope BER Testers to provide a calibrated Rx testing suite for specific standards like USB 3.0 and PCI Express Gen 3.”

BERTs Handle Physical Layer Test

 

Agilent Technologies offers several products for serial bus test, including the N4960A17/32-Gb/s BERT (Figure 1), the N4962A 12.5-Gb/s BERT, the N4963A 13.5-Gb/s clock source, the N4965A 12.5-Gb/s multichannel BERT, the N4967A 44-Gb/s BERT, the N4980A multi-instrument BERT Software instrument control panels, and the M8061A 28.4-Gb/s multiplexer with optional de-emphasis. Agilent’s Thomas Goetzelman noted that all these products are used for physical-layer testing, especially receiver testing.

Goetzelman explained that communications buses reached data rates of 25 Gb/s and beyond a few years ago, and computer buses are starting to extend beyond 10 Gb/s. Increasing speeds lead to more channel loss. Therefore, he said, “The need for de-emphasis on the Tx side as well as equalization on the Rx side become even more important.” This year, he said, Agilent launched two products to further address this need: the M8061A for the J-BERT platform and N4951B-D32 for the N4960A platform. “Both products allow multitap de-emphasis on data signals well beyond 12 Gb/s,” he said. The M8061A 2:1 multiplexer in combination with J-BERT operates up to 28.4 Gb/s, and the N4960A with N4951B-D32 head runs up to 32 Gb/s.

Another challenge is within the complexity of receiver tests and the necessary calibration procedures. The N5990A Test Automation Platform gets continuous product extensions and updates to help customers with challenging receiver test applications like PCI Express and MIPI for instance.

As for fixturing, Goetzelman said, “Wilder Technologies provides excellent fixtures for most standards.” Connections for Rx testing are connector-based, so there is no need for probing, he explained. In addition, he said, the M8061A for the J-BERT platform and N4951B-D32 for the N4960A platform can be used to partially compensate for cable and fixture losses in test setups. “The de-emphasis tap weight calculator that is part of the N4980A software is intended for this purpose,” he said. “On the transmitter side, products like N2809A PrecisionProbe oscilloscope software help to de-embed fixture and cable losses.”

High-Definition Oscilloscopes

Chris Busso, senior product marketing manager at Teledyne LeCroy, said, “The HDO Series oscilloscopes serve as the platform for much of the serial-bus testing offered by Teledyne LeCroy. The key to the extremely high performance of Teledyne LeCroy’s new HDO oscilloscopes is a 16x improvement in vertical resolution.” That improvement, he said, is due to Teledyne LeCroy’s HD4096 technology, which comprises high-sample-rate 12-bit ADCs, high signal-to-noise-ratio amplifiers, and low-noise system architecture.

Traditional 8-bit oscilloscopes, he said, have offered DC gain accuracy of typically from 1.5% to 2%—which is consistent with the resolution. By contrast, he said Teledyne LeCroy’s 12-bit oscilloscopes are specified for DC gain accuracy of ±0.5% of full scale while providing 12-bit resolution at bandwidths to 1 GHz.

“It is important to note that the HDO oscilloscopes are designed from the ground up as a low-noise, 12-bit hardware system, ensuring that the entire signal path, from probe tip to the 12.1-inch touch-screen display, is as clean as possible,” Busso said. The oscilloscopes’ 12-bit ADCs, he said, generate much less quantization noise, reduced nonlinearity, and lower aperture error than the 8-bit ADCs in other instruments.

In addition, the wideband amplifiers in the oscilloscopes’ front ends deliver a -55-dB or better signal-to-noise ratio across most volt/division ranges, thus feeding a higher fidelity signal to the ADCs to begin with. “We focused on harmonic distortion and spurious-free dynamic range to extract maximum benefit out of the 12-bit ADCs,” he said. “In the final analysis, a true 12-bit oscilloscope enables users to see and measure small-signal phenomena that are difficult to capture with an 8-bit system. This holds true for general-purpose measurements as well as for serial-data capture, decoding, and analysis.”

Busso said the oscilloscopes support a wide range of serial protocols, including I2C, SPI, CAN, LIN, FlexRay, USB 2.0-HSIC, MIL-STD-1553, ARINC 429, MIPI D-PHY, DigRF v4, Infiniband, and various audio interfaces.

“Oscilloscopes are great tools for debugging and analysis, but when it comes to physical-layer compliance and/or precompliance testing for serial-bus standards, they are even better when augmented with a means of automating such testing,” Busso said. “For that purpose, Teledyne LeCroy’s QualiPHY packages run on either the oscilloscope or a PC. The QualiPHY software connects to the oscilloscope firmware, sets up the instrument for all the pertinent measurements for a given standard’s compliance testing, and takes control.”

Teledyne LeCroy also offers a number of protocol analyzers, including Summit T24 with TeleScan software for PCI Express, SierraNet M408 and M168 for Ethernet and 16G Fiber Channel, and the Sierra M124 and M122 for SAS and SATA.

In addition, Busso said, “Many of today’s serial data-communications protocols are built on Manchester or NRZ encoding,” with basic Manchester and NRZ schemes modified to create more complex, specialized protocols. Teledyne LeCroy’s Manchester and NRZ protocol decoders aid in the process of designing and debugging such custom protocols by providing flexibility in terms of physical-layer characteristics, protocol word and frame structure, and other parameters.

Scopes and Probing Systems

Tektronix offers a number of hardware and software products for serial-bus test. Relevant instruments are the MSO70000DX Series oscilloscopes, including new 23-, 25-, and 33-GHz performance MSO models that enable complete system visibility of high-speed serial-bus system designs, such as those found in server-class computing systems.

 

The company also offers the P7633 33-GHz probing system (Figure 2), which Loberg called “a perfectly matched probing system for fourth-generation serial buses like PCI Express Gen 4. This probing system contains differential signaling access that optimizes channel utilization on the MSO70000DX Series.”

Tektronix also offers the MCA4000 memory compliance analyzer, which provides automated protocol compliance and performance statistics with concurrent real-time protocol and state trigger analyzers for DDR3, DDR3L, and DDR4 memory interfaces.

The company’s software introductions over the past year include, in addition to SDLA and MIPI software, USB 3.1 Serial Bus Automated Compliance Software, USB Power Compliance Software, PCI Express Serial Decode Software, Ethernet Compliance and Debug Software, and SAS3 Compliance and Debug Software.

Clock Data Recovery

Dave Rishavy, product manager, Rohde & Schwarz USA, said, “Rohde & Schwarz launched a breakthrough serial-bus and jitter package in June 2013.” The R&S RTO-K13 option, he said, introduces the first hardware-based Clock Data Recovery (CDR) functionality on an oscilloscope. “By recovering the clock in real time in hardware, versus the software method traditionally used in other oscilloscopes, substantial benefit to serial bus and jitter analysis can be realized,” he added.

The R&S RTO’s hardware-based CDR allows real-time triggering of serial high-speed signals. “This integrated solution enables fast signal-integrity analysis with tools like histogram and mask test which can operate on the recovered data at hundreds of thousands of waveforms per second,” Rishavy said. The R&S RTO CDR is configurable and therefore allows testing of many different interface types that use different PLL and CDR architectures. The R&S RTO HW-CDR supports a maximum data rate of 5 Gb/s.

In addition, Rishavy said, The R&S RTO K12 Jitter Analysis software option offers fast and easy operation. “A special highlight within the R&S RTO-K12 option is the Wizard tool that simplifies the setup and execution of jitter measurements and leads the user to fast results,” he noted, adding, “The Track function is another highlight of the R&S RTO-K12 option that allows the display of measurement results time-correlated to the waveform”—thereby enabling in-depth signal analysis.

Rishavy added that Rohde & Schwarz offers fixtures for the available serial-bus compliance sets. Examples are the R&S RT-ZF1 USB 2.0 Compliance Test Fixture and the R&S RT-ZF2 Ethernet Test Fixture. “These are critical to enable consistent and reliable results,” he said.

Multichannel Jitter Test

For its part, Anritsu has developed a multichannel jitter BERT to test high-speed serial buses, such as SerDes and PLL. Goto said, “The MP1800A BERT has been enhanced with a high-sensitivity error detector (ED) that features industry-best sensitivity and the fastest Auto Adjust function.” The BERT is complemented by 4PAM/8PAM converters and the MP1825B 4Tap Emphasis 32-Gb/s pre-emphasis converter (Figure 3).

 

“The enhanced MP1800A is the highest performing integrated solution to meet the complex signal-integrity requirements associated with testing physical-layer devices and modules designed for transmission speeds up to 32 Gb/s,” Goto said. “This high performance allows the MP1800A to support simultaneous multichannel measurements of low-amplitude, low-eye-opening DUTs, such as high-speed backplanes and active optical cables (including Infiniband EDR and 32G Fibre Channel), to achieve more accurate, ideal-signal-quality analysis.”

Goto added that installing the 28G/32G multichannel pulse pattern generator and ED module in the MP1800A allows the BERT to support PCBs with high-speed interconnects up to 32.1 Gb/s—thereby enabling BER measurements for device R&D while simultaneously measuring crosstalk between multichannels for more accurate signal-integrity analysis.

Anritsu designed the MP1825B with a compact remote head to minimize the cabling to the DUT and reduce intersymbol interference. “By using a shorter cable,” Goto said, “cable effects are minimized to help achieve high signal quality.”

DesignCon, scheduled for Jan. 28-31 in Santa Clara, will provide a venue for vendors to demonstrate their high-speed measurement capabilities. Rohde & Schwarz, for example, will feature the hardware-based CDR. Teledyne LeCroy will highlight its protocol analyzers as well as oscilloscopes. For the latter, the company will demonstrate multilane analysis, de-embedding and virtual probing, PCI Express 3.0 link equalization testing and full compliance testing, and other capabilities. The company will also highlight its two- to 12-port SPARQ signal integrity network analyzer.

In addition, “Anritsu will showcase a signal-integrity test solution that features the MP1800A dual-channel 32G jitter BERT and MP1825B 32G 4Tap Emphasis,” Goto said. “We also will have a 400G+ Super Channel test solution highlighting the MP1800A dual-channel 32G BERT and 4PAM converter. A third station will consist of the MP1800A dual-channel 32G jitter BERT with the BERTWave MP2100A and MS9740A optical spectrum analyzer that creates a 100G AOC/DAC Q-SFP test solution.”

Loberg said Tektronix will demonstrate support for fourth-generation serial-bus technologies like PCI Express and high-speed Ethernet technologies at DesignCon. Products will include new/updated oscilloscope models and enhanced automation software that speeds up compliance testing. “We also will be showing more detail about how the SDLA-64Bit software correlates with IBIS-AMI models from the EDA industry on our oscilloscopes. And for receiver testing, we will exhibit enhanced linear equalization to provide proper stressed eye signal generation up to 32Gb/s for BER results,” he said.

 

 

 

 

2024 The 11st China International Exhibition on EMC, Microwave, Antenna and Safety Tests & Certification (China EMC2024 & China MW2024)